SHB Express still going strong - PICMG 1.3 application examples

5PICMG got its start back in 1994 with the development of the first edge card computing industry standard: PICMG 1.0. Since then edge card computing has evolved to incorporate the latest PCI Express interface methodology and implementation standards in the SHB Express or PICMG 1.3 industry standard.

SHB Express or PICMG 1.3 is an industry standard for edge card processor boards; i.e., single-board computers or system host boards and system backplanes. The edge card processor board and backplane combination supports faster system MTTR [mean time to recovery] times, enhanced hardware platform stability, and expanded support for industry-standard plug-in cards. The last point is probably the most important because the system backplane in a PICMG 1.3-driven rackmount computer uses standard option card interface connectors that enable the most diverse usage of industry-standard, commercial off-the-shelf (COTS) plug-in cards.

The PICMG 1.3 standard defines the routing of 20 PCIe base links from the system host board’s edge connectors to a PICMG 1.3 backplane. With a mezzanine card design approach it is possible to expand the number of SHB-to-backplane PCIe links to 37 links depending on the number of SHB processors, chipset type, mezzanine card design and backplane type. Let’s take a look at a couple of system usage cases for SHB Express.

SHB Express usage case 1 – International Space Station – Microgravity Sciences Glovebox (MSG)

The International Space Station (ISS) is packed full of engineering systems necessary to fulfill the station’s science objectives. One such system is the Microgravity Sciences Glovebox (MSG) Video Upgrade Equipment (VUE) from Teledyne Brown Engineering that utilizes embedded multicore Intel processor technology incorporated into a PICMG 1.3 single-board computer (SBC) architecture. Key MSG VUE building blocks include a multislot PCI Express backplane, four Terabytes of RAID data storage boards, three terabytes of hard drive data storage, two types of video capture boards for both Gigabit Ethernet (GigE) Vision 2.0 and High Definition Serial Digital Interface (HD-SDI) video data, a serial communications board offering selectable RS232, RS422, or RS485 ports, and a data acquisition board to both monitor the health of the system as well as control video cameras and monitors. The VUE records experiments, documenting the operations for the earthbound science teams to analyze once the data has been transmitted to the ground.

The VUE was a significant digital upgrade to the previous MSG NTSC analog video system that eliminated the need for digital tapes to record the science and the inherent problems with transporting the physical media both up to and down from the ISS. The VUE also did away with tape media issues related to physical storage space and the crew time needed to change out the media during science operations. Tape media storage space, and the crew time needed to manipulate the data tapes were critically limited on ISS. The VUE system converted the MSG’s video system to digital data, thereby doing away with the physical media. The VUE’s digital data enables transmission to the ground via telemetry networks. This provided faster data accessibility to the ground science teams for starting their analysis within days of any MSG experiment. This compares to the multi-month wait time typical with the previous analog tape system.

A layout drawing of the overall MSG VUE is illustrated in Figure 1 with the control system or MSG Video Drawer located in the lower-left corner of the drawing.

Figure 1: MSG VUE layout.
(Click graphic to zoom)

The system control and data storage architecture of the MSG VUE video drawer consists of:

  • 1 – PICMG 1.3 single-board computer
  • 1 – PICMG 1.3 PCI Express backplane
  • 2 – 4TB SSD plug-in data storage boards configured in a RAID [redundant array of independent disks] array
  • 3 – 1TB HDDs for data storage backup
  • Video capture boards for GbE Vision 2 and HD-SDI video data
  • 1 – RS232/RS422/RS485 serial communications board
  • 1 – data acquisition board for system monitoring

Figure 2 illustrates the SHB Express SBC and backplane used in the VUE.

Figure 2: MCG VUE single-board computer and backplane.
(Click graphic to zoom by 1.8x)

SHB Express usage case 2 – fruit sorting

In fruit-packing applications, the need to provide an accurate and reliable method of sorting fruit based on optimum color, size, shape, and blemish-free surface clarity parameters is a constant need. When done right it can be a major competitive advantage for growers and packing house operators. There are various automatic vision solutions available that do a great job inspecting for presence and absence of items. Unfortunately, in fruit sorting the vision system needs to be able to make visual inspections based on analog or “degree of goodness” data. So what’s the answer to this dilemma?

For a major fruit grower co-op in California, the answer has been an SHB Express system host board like the one in Figure 2 communicating to a series of DSP cards plugged into the backplane and connected to cameras. The system shown in Figure 3 has an SHB running custom inspection software developed by the co-op and is able to perform all inspections at a rate of 40 ms per piece of fruit.

Figure 3: Fruit-inspection system.
(Click graphic to zoom by 1.9x)

The next-generation fruit-inspection system will use new inspection software, a later version PICMG 1.3 system host board featuring the latest Intel Xeon processor, a PCI Express Gen3 backplane, and a series of high-speed Ethernet cameras. Preliminary speed tests show a 90 percent reduction in inspection time compared to the previous system. This faster inspection time equates to being able process eight or nine pieces of fruit per second, with up to eight lanes of fruit running at a time. Upcoming mechanical changes to the sorting system will deliver a further speed improvement of 12-14 fruit per second all without bruising or damaging the fruit during inspection.

SHB Express usage case 3 – Multisegment system for battlefield intelligence

In airborne surveillance applications, reductions in the computer systems’ size, weight, and power (SWaP) – without sacrificing the data gathering and processing abilities of the aircraft’s intelligence personnel – are critical elements in determining mission success.

The SHB Express system illustrated in Figure 4 shows how up to four PICMG 1.3 system host boards can be supported by a PICMG 1.3, 4-segment backplane. The underlying technologies at work in the airborne computing systems deployed on this aircraft are dual-processor SBCs and passive backplanes utilizing multicore Intel processors and Intel Virtualization Technology, Intel AVX Extensions, and Intel HyperThreading. These technologies, combined with classified O/S and application software, make it possible to run hundreds of applications simultaneously within each SHB Express system onboard the aircraft. The bottom line is that the SHB Express systems onboard provide the troops with the latest and most up-to-date battlefield information possible.

Figure 4: Multisegment PICMG 1.3 system.
(Click graphic to zoom by 1.8x)

Next-generation edge card computing system host boards and backplanes

As embedded processor technology continues to evolve, and as the speed of technology innovation continues to accelerate, so must the publication speed of industry standards. A new edge card computing standard called HDEC (high density embedded computing) has been developed and introduced by Trenton that replaces the single-density card-edge fingers and PCI Express sockets on the PICMG 1.3 processor boards and backplanes with double-density PCI Express connection points. This configuration enables HDEC processor boards to support up to 88 lanes of PCIe 3.0 from the board’s card fingers directly to the system backplane. The HDEC architecture supports the latest long-life Intel server processors in a dual-processor/SBC form factor while delivering faster system throughput with lower data latencies.

Jim Renehan is director of marketing and business development for Trenton Technology. Jim has held various marketing and application engineering positions in the embedded computing, industrial automation, and automatic identification industries. Jim holds a BS in Industrial Technology from Iowa State University of Science and Technology in Ames, Iowa.

Trenton Technology