This popular standard continues to be updated as improvements and changes to silicon continue. The subcommittee has been focused on support for four 10 G KR interfaces with a new Type 7 pinout. Discussions have revolved around the total number of signals to support the 10 G channels, including interfaces for PHY configuration, LEDs, and management. Simulation results are being reviewed to determine if ground guard banding is necessary for the high-speed signals – there is one differential pair running at 10 G.
At this time, the group is looking to reassign the digital display interface (DDI) pins for the 10 G signals. The expectation is that silicon that supports multiple 10 G will likely be headless. The group would like to publish a preliminary pinout as soon as possible, likely by the end of March. Additional discussion centers around trying to harmonize the AB connector usage between new module types so that customers can easily migrate from Type 10 to Type 7. The COM Express subcommittee is also considering increasing the existing Ethernet interface from 10/100/1000 Mb to 10 G.
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